FET Gate Driver Utilising Transient Gate Overvoltage

Druh výsledku
článek ve sborníku
Popis
In this paper a method for driving field effect transistors is described. This method uses a short high-voltage pulse on the gate to mitigate the effects of parasitic gate inductance and resistance. The proposed driver was able to reduce the fall time of drain voltage from 12 ns to 4 ns compared to conventional driving.
Klíčová slova
gate driver, FET, gate overvoltage, switching speed